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20141003Notes

By next HURRICANE meeting:

1. finish debugging MIM flow
2. port technology to 28nm and create BWRC repo for 28nm version
3. get BWRC accounts and sign any NDAs necessary
4. test more designs (bigger PFB, Correlator, FFT) on dreamer
5. tape-out proposal:
   1. Hurricane - we need the array on the chip
   2. high-speed IO - which??
      • an interesting DSP processor needs high-speed IO
      • radio astronomy / visual demos need high-speed IO
   3. debug/test IO - need alternative to high-speed IO
      • daisy chain (already done)
      • SRAM FIFOs at boundaries - replicate high-speed IO
   4. can we get 2 GHz memories? how big are they?
   5. how much area can we have? how much area is one tile? how many tiles can/should we tape out? tile-limited or IO-limited?