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Related

Layout algorithms

• Tabu Search
• Parallel Tempering (variant of simulated annealing)
• Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization
• VPR paper (academic FPGA place-and-route toolchain)
• Timing Driven VPR paper (timing aware improved FPGA place-and-route toolchain)
• Parallel VPR paper (parallel implementation of academic FPGA place-and-route toolchain)

Other CAD algorithms

• FlowMap: Optimal LUT mapping

Emulation engines

• yorktown simulation engine
• IBM Engineering Verification Engine
• malibu details thesis (better FPGA architecture, including a description of layout algorithms / compile tools)
• malibu cad acm

Unsorted - categorize them (and perhaps add a short blurb), if you can!

• Virtual Wires
• charm
• tektronix fpga monitoring
• wikipedia hardware emulation
• Experimental Analysis of the Fastest Optimum Cycle Ratio and Mean Algorithms
• System-level Timing Analysis and Optimizations for Hardware Compilation